### Design Overview for biili

Property | Value
Project Name: | z:\ohjelmoitavatporttimatriisit\auto
Target Device: | xc2s300e
Report Generated: | Friday 12/15/06 at 14:15
Printable Summary (View as HTML) | biili_summary.html

### Device Utilization Summary

Logic Utilization | Used | Available | Utilization | Note(s)
Number of Slice Flip Flops: | 159 | 6,144 | 2% |
Number of 4 input LUTs: | 209 | 6,144 | 3% |
Logic Distribution: |  |  |  |
Number of occupied Slices: | 192 | 3,072 | 6% |
Number of Slices containing only related logic: | 192 | 192 | 100% |
Number of Slices containing unrelated logic: | 0 | 192 | 0% |
Total Number 4 input LUTs: | 309 | 6,144 | 5% |
Number used as logic: | 209 |  |  |
Number used as a route-thru: | 100 |  |  |
Number of bonded IOBs: | 27 | 142 | 19% |
Number of GCLKs: | 1 | 4 | 25% |
Number of GCLKIOBs: | 1 | 4 | 25% |

### Performance Summary

Property | Value
Number of Unrouted Signals: | All signals are completely routed.
Number of Failing Constraints: | 0

### Failing Constraints

Constraint(s) | Requested | Actual | Logic Levels
No Constraints Found |  |  |

### Detailed Reports

Report Name | Status | Last Date Modified
Synthesis Report | Current | Friday 12/15/06 at 14:15
Translation Report | Current | Friday 12/15/06 at 14:15
Map Report | Current | Friday 12/15/06 at 14:15
Pad Report | Current | Friday 12/15/06 at 14:15
Place and Route Report | Current | Friday 12/15/06 at 14:15
Post Place and Route Static Timing Report | Current | Friday 12/15/06 at 14:15
Bitgen Report | Current | Friday 12/15/06 at 14:15